MT101 IP core is a programmable, Multi Standard DTV and Mobile TV demodulation solution. The MT101 is built around ASOCS' ModemX multi-core DSP platform, enabling the scale up or down to support any number of TV standards concurrently as well as diversity of two or more antennas. The core is optimized for integration in a 3rd party SoC.
The MT101 includes a complete demodulator core from the tuner interfaces (LOW IF and Complex baseband I/Q), via demodulation and error correction, to output of the relevant streams. It also includes the SW driver supporting all the TV standards. The core can be interfaced to several RF chips concurrently.
The MT101 provides small silicon area and low power consumption competitive with dedicated hardware, making it ideal for applications such as Mobile TV, Digital TV and Set-top boxes.
- Single core supporting all DTV standards by appropriate firmware programming
- Easy interface to a wide range of RF receiver chips
- Flexible interface to SoC bus matrix: Slave, Master or both
- Several alternatives for memory integration (on-core, off-core)
- ISDB-T (1 / 3 / full-Seg)
- ATSC –M/H
- The core can be scaled up to support multiple standards as well as cellular and wireless modems concurrently with the DTV demodulators.
- The core can be scaled down to support a smaller set of features
- Demodulator firmware is seamlessly ported from one core version to the next
- The core has a flexible tuner interfaces supporting LOW IF and Complex baseband (I/Q).
- The core is a fully synchronous design and requires a single clock.
- Low clock frequency 160MHz - 320MHz
- Verilog RTL code with synthesis scripts
- Test bench verification environment
- Synthesis constrains file for Cadence flow
- Static timing analysis constrains file
- Floorplan guidelines
- SW driver
- User documentation
- Performance simulation environment (optional)